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AM79C976 Datasheet(PDF) 222 Page - Advanced Micro Devices

Part # AM79C976
Description  PCnet-PRO??10/100 Mbps PCI Ethernet Controller
PDF  309 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C976 Datasheet(HTML) 222 Page - Advanced Micro Devices

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Am79C976
8/01/00
P R E L I M INARY
%&53&, '$7$ 5HJLVWHU7KUHH '$7$ $OLDV
5HJLVWHU
Note: This register is an alias of the DATA register and
also of the DATA_SCALE field of the PCMCR register.
Since these two are read only, BCR40 provides a
means of programming them through the EEPROM.
The contents of this register are copied into the corre-
sponding fields pointed with the DATA_SEL field set to
three. Bits 15-0 in this register are programmable
through the EEPROM.
Bit
Name
Description
15-10
RES
Reserved locations. Written as
zeros and read as undefined.
9-8
D3_SCALE These bits correspond to the
DATA_SCALE field of the PMC-
SR (offset Register 44 of the PCI
configuration space, bits 14-13).
Refer
to
the
description
of
DATA_SCALE for the meaning of
this field.
D3_SCALE is read only. Cleared
by H_RESET and is not affected
by S_RESET or setting the STOP
bit.
7-0
DATA3
These bits correspond to the PCI
DATA register (offset Register 47
of the PCI configuration space,
bits 7-0). Refer to the description
of DATA register for the meaning
of this field.
DATA3 is read only. Cleared by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
%&53&, '$7$ 5HJLVWHU)RXU '$7$ $OLDV
5HJLVWHU
Note: This register is an alias of the DATA register and
also of the DATA_SCALE field of the PCMCR register.
Since these two are read only, BCR41 provides a
means of programming them through the EEPROM.
The contents of this register are copied into the corre-
sponding fields pointed with the DATA_SEL field set to
four. Bits 15-0 in this register are programmable
through the EEPROM.
Bit
Name
Description
15-10
RES
Reserved locations. Written as
zeros and read as undefined.
9-8
D4_SCALE These bits correspond to the
DATA_SCALE field of the PMC-
SR (offset register 44 of the PCI
configuration space, bits 14-13).
Refer
to
the
description
of
DATA_SCALE for the meaning of
this field.
D4_SCALE is read only. Cleared
by H_RESET and is not affected
by S_RESET or setting the STOP
bit
7-0
DATA4
These bits correspond to the PCI
DATA register (offset Register 47
of the PCI configuration space,
bits 7-0). Refer to the description
of DATA register for the meaning
of this field.
DATA4 is read only. Cleared by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
%&53&, '$7$ 5HJLVWHU)LYH '$7$ $OLDV
5HJLVWHU
Note: This register is an alias of the DATA register and
also of the DATA_SCALE field of the PCMCR register.
Since these two are read only, BCR42 provides a
means of programming them through the EEPROM.
The contents of this register are copied into the corre-
sponding fields pointed with the DATA_SEL field set to
five. Bits 15-0 in this register are programmable
through the EEPROM.
Bit
Name
Description
15-10
RES
Reserved locations. Written as
zeros and read as undefined.
9-8
D5_SCALE These bits correspond to the
DATA_SCALE field of the PMC-
SR (offset Register 44 of the PCI
configuration space, bits 14-13).
Refer
to
the
description
of
DATA_SCALE for the meaning of
this field.
D5_SCALE is read only. Cleared
by H_RESET and is not affected
by S_RESET or setting the STOP
bit.
7-0
DATA5
These bits correspond to the PCI
DATA register (offset Register 47
of the PCI configuration space,
bits 7-0). Refer to the description
of DATA register for the meaning
of this field.
DATA5 is read only. Cleared by
H_RESET and is not affected by



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