AM79C976 datasheet(220/309 Pages) AMD

220 / 309 page

220

Am79C976

8/01/00

P R E L I M INARY

5-bit Register Address field that is

used in the management frame

that gets clocked out via the MII

management port pins (MDC and

MDIO) whenever a read or write

transaction occurs to BCR34.

Read/Write accessible. REGAD

is undefined after H_RESET and

is unaffected by S_RESET and

the STOP bit.

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Bit

Name

Description

31-16

RES

Reserved locations. Written as

zeros and read as undefined.

15-0

MIIMD

MII Management Data. MIIMD is

the data port for operations on

the MII management interface

(MDIO

and

MDC).

The

Am79C976 device builds man-

agement frames using the PHY-

AD and REGAD values from

BCR33. The operation code used

in each frame is based upon

whether a read or write operation

has been performed to BCR34.

Read cycles on the MII manage-

ment interface are invoked when

BCR34 is read. Upon completion

of the read cycle, the 16-bit result

of the read operation is stored in

MIIMD. Write cycles on the MII

management interface are in-

voked when BCR34 is written.

The value written to MIIMD is the

value used in the data field of the

management write frame.

Read/Write accessible. MIIMD is

undefined after H_RESET and is

unaffected by S_RESET and the

STOP bit.

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Note: Bits 15-0 in this register are programmable

through the EEPROM.

Bit

Name

Description

31-16

RES

Reserved locations. Written as

zeros and read as undefined.

15-0

VID

Vendor ID. The PCI Vendor ID

identifies the manufacturer of the

Am79C976

controller.

AMD’s

Vendor ID is 1022h. Note that this

Vendor ID is not the same as the

Manufacturer ID in CSR88 and

CSR89. The Vendor ID is as-

signed by the PCI Special Inter-

est Group.

The Vendor ID is not normally

programmable,

but

the

Am79C976 controller allows this

due to legacy operating systems

that do not look at the PCI Sub-

system Vendor ID and the Ven-

dor ID to uniquely identify the

add-in board or subsystem that

the Am79C976 controller is used

in.

Note: If the operating system or

the network operating system

supports PCI Subsystem Vendor

ID and Subsystem ID, use those

to identify the add-in board or

subsystem and program the VID

with the default value of 1022h.

VID is aliased to the PCI configu-

ration space register Vendor ID

(offset 00h).

VID is read only. Write operations

are ignored. VID is set to 1022h

by H_RESET and is not affected

by S_RESET or by setting the

STOP bit.

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This register is an alias of the PMC register located at

offset 42h of the PCI Configuration Space. It is included

for compatibility with older PCnet devices. Since the

PMC register is read only, in older PCnet devices

BCR36 provides a means of programming PMC

through the EEPROM.

In the Am79C976 controller there is a single PMC reg-

ister that can be accessed through three different mem-

ory spaces. It can be accessed as read-only through

PCI Configuration Space (at offset 42h), read-only

through BCR36, or read-write through the memory-

mapped PMC Alias Register at offset 1B8h. It can be

loaded from the EEPROM through offset 1B8h in the

Am79C976 controller’s memory-mapped I/O space.

For the definition of the bits in this register, refer to the

PMC register definition. BCR36 is read only. It is set to

0C802h by H_RESET and is not affected by S_RESET

or setting the STOP bit.

AM79C976 Datasheet(PDF) 220 Page - Advanced Micro Devices

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