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AM8530 Datasheet(PDF) 101 Page - Advanced Micro Devices |
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AM8530 Datasheet(HTML) 101 Page - Advanced Micro Devices |
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101 / 194 page  Support Circuitry Programming AMD 5–7 If neither the transmit clock nor the receive clock is programmed to come from the TRxC pin, the output of the BRG may be made available for external use on the TRxC pin. Figure 5–2 shows a block diagram of the BRG. The BRG input comes from the output of a two-input multiplexer, and the zero count condition is outputed to the External/Status Interrupt section. The BRG may be disabled and enabled by command and is disabled by a hardware reset. Zero Count ÷2 Baud Rate Generator Clock RTxC Pin PCLK Pin Select Output WR13 WR12 16 Bit Down Counter Figure 5–2. Baud Rate Generator Write to WR14 Clock Source Counter Clock Counter First Decremented (After Hardware Reset) Counter First Decremented (After Previous Disable) End of Write to WR14 with Enable Figure 5–3. BRG Startup |
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