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AMD-K6 Datasheet(PDF) 25 Page - Advanced Micro Devices |
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AMD-K6 Datasheet(HTML) 25 Page - Advanced Micro Devices |
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25 / 346 page ![]() Chapter 2 Internal Architecture 7 20695H/0—March 1998 AMD-K6® Processor Data Sheet Preliminary Information 2 Internal Architecture 2.1 Introduction The AMD-K6 processor implements advanced design techniques know n as the RISC 86 microarch i t ecture . Th e RISC 8 6 microarchitecture is a decoupled decode/execution design approach that yields superior sixth-generation performance for x86-based software. This chapter describes the techniques used and the functional elements of the RISC86 microarchitecture. 2.2 AMD-K6® Processor Microarchitecture Overview When discussing processor design, it is important to understand the term s architectur e , m i croar chitectur e , an d des i g n implementation. The term architecture refers to the instruction set and features of a processor that are visible to software prog ra ms runni n g on the process o r. Th e arch ite c t u re de termines w hat softwa re the processor can run. The architecture of the AMD-K6 processor is the industry-standard x86 instruction set. The term microarchitecture refers to the design techniques used in the processor to reach the target cost, performance, and functionality goals. The AMD-K6 is based on a sophisticated RISC core known as the Enhanced RISC86 microarchitecture. The Enhanced RISC86 microarchitecture is an advanced, second-order decoupled decode/execution design approach that enables industry-leading performance for x86-based software. The term design implementation refers to the actual logic and circuit designs from which the processor is created according to the microarchitecture specifications. |
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