AMD-K6 datasheet(38/346 Pages) AMD

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Internal Architecture

Chapter 2

AMD-K6® Processor Data Sheet

20695H/0—March 1998

Preliminary Information

Return Address Stack

The return address stack is a special device designed to

optimize CALL and RET pairs. Software is typically compiled

with subroutines that are frequently called from various places

in a program. This is usually done to save space. Entry into the

subroutine occurs with the execution of a CALL instruction. At

that time, the processor pushes the address of the next

instruction in memory following the CALL instruction onto the

stack (allocated space in memory). When the processor

encounters a RET instruction (within or at the end of the

subroutine), the branch logic pops the address from the stack

and begins fetching from that location. To avoid the latency of

main memory accesses during CALL and RET operations, the

return address stack caches the pushed addresses.

Branch Execution

Unit

The branch execution unit enables efficient speculative

execution. This unit gives the processor the ability to execute

instructions beyond conditional branches before knowing

whether the branch prediction was correct. The AMD-K6

processor does not permanently update the x86 registers or

memory locations until all speculatively executed conditional

branch instructions are resolved. When a prediction is

inco rre c t, th e pro c e sso r ba ck s out to the po int o f the

mispredicted branch instruction and restores all registers. The

AMD-K6 can support up to seven outstanding branches.

AMD-K6 Datasheet(PDF) 38 Page - Advanced Micro Devices