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AMD-K6 Datasheet(PDF) 32 Page - Advanced Micro Devices

Part # AMD-K6
Description  AMD-K6 Processor
PDF  346 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AMD-K6 Datasheet(HTML) 32 Page - Advanced Micro Devices

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14
Internal Architecture
Chapter 2
AMD-K6® Processor Data Sheet
20695H/0—March 1998
Preliminary Information
Instruction Decode
The AMD-K6 processor decode logic is designed to decode
multiple x86 instructions per clock (see Figure 4). The decode
logic accepts x86 instruction bytes and their predecode bits
from the instruction buffer, locates the actual instruction
boundaries, and generates RISC86 operations from these x86
instructions.
RISC86 operations are fixed-format internal instructions. Most
RISC86 operations execute in a single clock. RISC86 operations
are combined to perform every function of the x86 instruction
set. Some x86 instructions are decoded into as few as zero
RI SC86 opcodes — for instance a NOP — or one RI SC86
operation — a register-to-register add. More complex x86
instructions are decoded into several RISC86 operations.
Figure 4. AMD-K6® Processor Decode Logic
Instruction Buffer
4 RISC86 Operations
On-Chip ROM
Long Decoder
Short Decoder #1
Short Decoder #2
Vector Address
Vector Decoder
RISC86® Sequencer



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