AMD-K6 datasheet(66/346 Pages) AMD

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Software Environment

Chapter 3

AMD-K6® Processor Data Sheet

20695H/0—March 1998

Preliminary Information

Figure 42. Gate Descriptor

Exceptions and

Interrupts

Table 9 summarizes the exceptions and interrupts.

DPL

Type

Offset 31–16

Segment Selector

Offset 15–0

7654

321

31 30 29 28 27 26 25 24 23 22

Symbol

Description

Bits

Present/Valid Bit

DPL

Descriptor Privilege Level

14-13

Descriptor Type

Type

See Table 8

11-8

Reserved

Table 9.

Summary of Exceptions and Interrupts

Interrupt

Number

Interrupt Type

Cause

Divide by Zero Error

DIV, IDIV

Debug

Debug trap or fault

Non-Maskable Interrupt NMI signal sampled asserted

Breakpoint

Int 3

Overflow

INTO

Bounds Check

BOUND

Invalid Opcode

Invalid instruction

Device Not Available

ESC and WAIT

Double Fault

Fault occurs while handling a fault

Reserved - Interrupt 13

—

Invalid TSS

Task switch to an invalid segment

Segment Not Present

Instruction loads a segment and present bit is 0 (invalid segment)

Stack Segment

Stack operation causes limit violation or present bit is 0

General Protection

Segment related or miscellaneous invalid actions

Page Fault

Page protection violation or a reference to missing page

Floating-Point Error

Arithmetic error generated by floating-point instruction

Alignment Check

Data reference to an unaligned operand. (The AC flag and the AM bit of CR0 are

set to 1.)

0-255

Software Interrupt

INT n

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