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AMD-K6 Datasheet(PDF) 12 Page - Advanced Micro Devices |
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AMD-K6 Datasheet(HTML) 12 Page - Advanced Micro Devices |
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12 / 346 page ![]() xii List of Figures AMD-K6® Processor Data Sheet 20695H/0—March 1998 Preliminary Information Figure 35. 4-Kbyte Paging Mechanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Figure 36. 4-Mbyte Paging Mechanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 37. Page Directory Entry 4-Kbyte Page Table (PDE) . . . . . . . . . . . 44 Figure 38. Page Directory Entry 4-Mbyte Page Table (PDE) . . . . . . . . . . 44 Figure 39. Page Table Entry (PTE). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Figure 40. Application Segment Descriptor . . . . . . . . . . . . . . . . . . . . . . . . 46 Figure 41. System Segment Descriptor . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Figure 42. Gate Descriptor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Figure 43. Waveform Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122 Figure 44. Bus State Machine Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 Figure 45. Non-Pipelined Single-Transfer Memory Read/Write and Write Delayed by EWBE# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 Figure 46. Misaligned Single-Transfer Memory Read and Write . . . . . . 129 Figure 47. Burst Reads and Pipelined Burst Reads . . . . . . . . . . . . . . . . . 131 Figure 48. Burst Writeback due to Cache-Line Replacement . . . . . . . . . 133 Figure 49. Basic I/O Read and Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134 Figure 50. Misaligned I/O Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 Figure 51. Basic HOLD/HLDA Operation . . . . . . . . . . . . . . . . . . . . . . . . . 137 Figure 52. HOLD-Initiated Inquire Hit to Shared or Exclusive Line . . . 139 Figure 53. HOLD-Initiated Inquire Hit to Modified Line. . . . . . . . . . . . . 141 Figure 54. AHOLD-Initiated Inquire Miss . . . . . . . . . . . . . . . . . . . . . . . . . 143 Figure 55. AHOLD-Initiated Inquire Hit to Shared or Exclusive Line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145 Figure 56. AHOLD-Initiated Inquire Hit to Modified Line . . . . . . . . . . . 147 Figure 57. AHOLD Restriction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149 Figure 58. BOFF# Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151 Figure 59. Basic Locked Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153 Figure 60. Locked Operation with BOFF# Intervention. . . . . . . . . . . . . . 155 Figure 61. Interrupt Acknowledge Operation . . . . . . . . . . . . . . . . . . . . . . 157 Figure 62. Basic Special Bus Cycle (Halt Cycle) . . . . . . . . . . . . . . . . . . . . 159 Figure 63. Shutdown Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 Figure 64. Stop Grant and Stop Clock Modes, Part 1 . . . . . . . . . . . . . . . . 162 Figure 65. Stop Grant and Stop Clock Modes, Part 2 . . . . . . . . . . . . . . . . 163 Figure 66. INIT-Initiated Transition from Protected Mode to Real Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 Figure 67. Cache Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171 Figure 68. Cache Sector Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172 Figure 69. Write Handling Control Register (WHCR) . . . . . . . . . . . . . . . 179 Figure 70. Write Allocate Logic Mechanisms and Conditions . . . . . . . . . 180 Figure 71. External Logic for Supporting Floating-Point Exceptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190 |
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