AD9656 datasheet(10/44 Pages) AD

Part #	AD9656

Description	Quad, 16-Bit, 125 MSPS, JESD204B 1.8 V Analog-to-Digital Converter

PDF	44 Pages

Scroll/Zoom	100%

Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

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10 / 44 page

AD9656

Data Sheet

Timing Diagrams

Refer to the Memory Map Register Table section for SPI register settings.

Figure 2. Data Output Timing

Figure 3. DSYSREF+/DSYSREF− Setup and Hold Timing (Clock Divider = 1)

VINA+/

VINA–

VINB+/

VINB–

VINC+/

VINC–

VIND+/

VIND–

CLK+

CLK–

SERDOUTx+

CLK+

CLK–

SERDOUTx–

VINB, SAMPLE N – 23,

MSB FIRST, 8B/10B

ENCODED DATA

VINC, SAMPLE N – 23,

MSB FIRST, 8B/10B

ENCODED DATA

VIND, SAMPLE N – 23,

MSB FIRST, 8B/10B

ENCODED DATA

VINA, SAMPLE N – 23,

MSB FIRST, 8B/10B

ENCODED DATA

SAMPLE N

N – 23

N – 21

N – 22

N + 1

N – 1

N – 20

SAMPLE N

N – 23

N – 21

N – 22

N + 1

N – 1

N – 20

SAMPLE N

N – 23

N – 21

N – 22

N + 1

N – 1

N – 20

SAMPLE N

N – 23

N – 21

N – 22

N + 1

N – 1

N – 20

N – 19

tREFS

CLK+

CLK–

DSYSREF–

DSYSREF+

tREFH

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