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UM0434 Datasheet(PDF) 195 Page - STMicroelectronics |
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UM0434 Datasheet(HTML) 195 Page - STMicroelectronics |
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195 / 390 page ![]() Memory management unit UM0434 196/391 7.2.4 Translation flow The effective address, concatenated with the address space value of the corresponding MSR bit (MSR[IS] or MSR[DS]), is compared to the appropriate number of bits of the EPN field (depending on the page size) and the TS field of TLB entries. If the contents of the effective address plus the address space bit matches the EPN field and TS bit of the TLB entry, that TLB entry is a candidate for a possible translation match. In addition to a match in the EPN field and TS, a matching TLB entry must match with the current process ID of the access (in PID0), or have a TID value of 0, indicating that the entry is globally shared among all processes. Figure 8 shows the translation match logic for the effective address plus its attributes, collectively called the virtual address, and how it is compared with the corresponding fields in the TLB entries. Figure 8. Virtual address and TLB-Entry compare process The page size defined for a TLB entry determines how many bits of the effective address are compared with the corresponding EPN field in the TLB entry as shown in Table 151. On a TLB hit, the corresponding bits of the real page number (RPN) field are used to form the real address, and the generation of the physical address occurs as shown in Figure 7. Table 151. Page size (for e200z3 Core) and EPN field comparison SIZE Field Page Size (4SIZE Kbytes) EA to EPN Comparison (Bits 32–53; 2 × SIZE) 0b0001 4 Kbytes EA[32–51] = EPN[32–51]? 0b0010 16 Kbytes EA[32–49] = EPN[0–49]? 0b0011 64 Kbytes EA[32–47] = EPN[32–47]? 0b0100 256 Kbytes EA[32–45] = EPN[32–45]? 0b0101 1 Mbyte EA[32–43] = EPN[32–43]? 0b0110 4 Mbytes EA[32–41] = EPN[32–41]? 0b0111 16 Mbytes EA[32–39] = EPN[32–39]? 0b1000 64 Mbytes EA[32–37] = EPN[32–37]? 0b1001 256 Mbytes EA[32–35] = EPN[32–35]? TLB Entry Hit =0? Private Page Shared Page e =? =? TLB_entry[V] TLB_entry[TS] TLB_entry[TID] TLB_entry[EPN] AS (from MSR[IS] or MSR[DS]) Process ID EA Page Number Bits =? |
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