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UM0434 Datasheet(PDF) 204 Page - STMicroelectronics

Part # UM0434
Description  The primary objective of this user?셲 manual is to describe
PDF  390 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

UM0434 Datasheet(HTML) 204 Page - STMicroelectronics

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UM0434
Memory management unit
205/391
MAS register updates
Table 156 details the updates to each MAS register field for each update type.
7.7
Effect of hardware debug on MMU operation
Hardware debug facilities use normal CPU instructions to access register and memory
contents during a debug session. If desired, the debug firmware may disable the translation
process and may substitute default values for the access protection (UX, UR, UW, SX, SR,
SW) bits and values obtained from the OnCE control register for page attribute (W,I,M,G,E)
bits normally provided by a matching TLB entry. In addition, no address translation is
performed; instead, a 1:1 mapping of effective-to-real addresses is performed. When
disabled during the debug, no TLB miss or TLB access protection related DSI conditions
occur. If there is a need for the debugger to use normal translation process, the MMU may
be left enabled in the OnCE OCR, and normal translation (including the possibility of a TLB
miss or DSI) remains in effect. See:
Chapter : OnCE control register (OCR),” for details on
controlling MMU operation during debug sessions.
Table 156.
MMU assist register field updates
Bit/Field
MAS
Affected
ITLB/DTLB Error
tlbsx hit
tlbsx miss
tlbre
tlbwe
ISI/DS
I
TLBSEL
0
TLBSELD
‘01’
TLBSELD
NC(1)
NC
NC
ESEL
0
NV
Matched entry
NV
NC
NC
NC
NV
0
NC
NC
NC
NC
NC
NC
VALID
1
1
1
0
V(array)
NC
NC
IPROT
1
0
Matched
IPROT
0
IPROT(array)
NC
NC
TID[0–7]
1
TIDSELD
(PID0,TIDZ)
TID(array)
SPID
TID(array)
NC
NC
TS
1
MSR(IS/DS)
SAS
SAS
TS(array)
NC
NC
TSIZE[0–3]
1
TSIZED
TSIZE(array)
TSIZED
TSIZE(array)
NC
NC
EPN[0–19]
2
I/D EPN
EPN(array)
tlbsx EPN
EPN(array)
NC
NC
WIMGE
2
Default values
WIMGE(array)
Default
values
WIMGE(array)
NC
NC
RPN[0–19]
3
Zeroed
RPN(Array)
Zeroed
RPN(array)
NC
NC
ACCESS
(PERMISS
+ U0–U3)
3
Zeroed
Access(Array)
Zeroed
Access(array)
NC
NC
TLBSELD
4
NC
NC
NC
NC
NC
NC
TIDSELD[0–1]
4
NC
NC
NC
NC
NC
NC
TSIZED[0–3]
4
NC
NC
NC
NC
NC
NC
Default WIMGE
4
NC
NC
NC
NC
NC
NC
SPID
6
PID0
NC
NC
NC
NC
NC
SAS
6
MSR(IS/DS)
NC
NC
NC
NC
NC
1.
NC—no change



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