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UM0434 Datasheet(PDF) 238 Page - STMicroelectronics

Part # UM0434
Description  The primary objective of this user?셲 manual is to describe
PDF  390 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

UM0434 Datasheet(HTML) 238 Page - STMicroelectronics

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UM0434
External core complex interfaces
239/391
Master ID configuration signals
p_masterid[3:0]
I
—
CPU master ID configuration
nex_masterid[3:0]
I
—
Nexus3 master ID configuration
Interrupt interface signals
p_extint_b
I
External input interrupt request
p_critint_b
I
Critical input interrupt request
p_avec_b
I
Autovector request. Use internal interrupt vector offset.
p_voffset[0:15]
I
Interrupt vector offset for vectored interrupts
p_iack
O0
Interrupt acknowledge. Indicates an interrupt is being
acknowledged.
p_ipend
O
0
Interrupt pending. Indicates an interrupt is pending internally.
p_mcp_b
I
Machine check input request
Time base signals
p_tbint
O
0
Time base interrupt
p_tbdisable
I
—
Time base disable input
p_tbclk
I
—
Time base clock input
Misc. CPU signals
p_cpuid[0:7]
I
CPU ID input
p_sysvers[0:31]
I
System version inputs (for SVR)
p_pvrin[16:31]
I
Inputs for PVR
p_pid0[0:7]
O
0
PID0[24:31] outputs
p_pid0_updt
O
0
PID0 update status
CPU reservation signals
p_rsrv
O
0
Reservation status
p_rsrv_clr
I
Clear reservation flag
CPU state signals
p_pstat[0:6]
O
0
Processor status
p_brstat[0:1]
O
0
Branch prediction status
p_mcp_out
O
0
Machine check occurred
p_chkstop
O
0
Checkstop occurred
p_doze
O
0
Low-power doze mode of operation
p_nap
O
0
Low-power nap mode of operation
p_sleep
O
0
Low-power sleep mode of operation
Table 165.
Interface signal definitions (continued)
Signal name
I/O Reset
Definition



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