UM0434 datasheet(288/390 Pages) STMICROELECTRONICS

Part #	UM0434

Description	The primary objective of this user?셲 manual is to describe

PDF	390 Pages

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

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288 / 390 page

UM0434

External core complex interfaces

289/391

Address retraction does not occur on a requested write cycle, only on read cycles. It also

may occur any time during a burst cycle.

9.5.5

Power management

Figure 59 shows the relationship of the wake-up control signal p_wakeup to the relevant

input signals.

Figure 59.

Wakeup control signal (p_wakeup)

9.5.6

Interrupt interface

Figure 60 shows the relationship of the interrupt input signals to the CPU clock. The

p_avec_b, p_extint_b, p_critint_b, and p_voffset[0:15] inputs must meet setup and hold

timing relative to the rising edge of

m_clk. In addition, during each clock cycle in which either

p_extint_b or p_critint_b is asserted, p_avec_b and p_voffset[0:15] are required to be in a

valid state for the highest priority interrupt requested.

Figure 60.

Interrupt interface input signals

m_clk

p_extint_b

p_wakeup

p_critint_b

jd_de_b,

p_ude,

OCR[WKUP]

p_extint_b

p_voffset[0:15]

p_critint_b

p_avec_b

m_clk

UM0434 Datasheet(PDF) 288 Page - STMicroelectronics