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UPD17015 Datasheet(PDF) 3 Page - NEC |
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UPD17015 Datasheet(HTML) 3 Page - NEC |
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3 / 120 page  3 µPD17015 BLOCK DIAGRAM P0A 0 P0A 1 P0A 2 P0A 3 P0C 0 P0C 1 P0C 2 P0C 3 X IN X OUT P0OD 0/BEEP P0B 0 P0B 1 P0B 2 CPU Peripheral LCD 0 LCD 1 LCD 2 LCD 3 LCD 4 LCD 5 LCD 6 LCD 7 LCD 8 COM 0 COM 1 COM 2 COM 3 V LCD0 V LCD1 V REG V DD CE GND CAP 0 CAP 1 EO VCOH VCOL P0A P0B P0C RF RAM 97 × 4 bits ROM 1528 × 16 bits ALU Instruction Decoder SYSTEM REGISTER Beep P0D OSC Basic Timer 0 Basic Timer 1 Program Counter 11 bits Stack 1 × 11 bits LCD Controller/ Driver Voltage Doubler PLL PLL Voltage Regulator Reset |
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