UPD17015 datasheet(6/120 Pages) NEC

6 / 120 page

µPD17015

DATA BUFFER (DBF) ................................................................................................................

8.1

OVERVIEW ......................................................................................................................................

8.2

RELATIONSHIP BETWEEN THE PERIPHERAL HARDWARE AND DATA BUFFER ..............

8.3

NOTES ON USING THE DATA BUFFER ......................................................................................

GENERAL-PURPOSE PORTS ...................................................................................................

9.1

OVERVIEW ......................................................................................................................................

9.2

GENERAL-PURPOSE I/O PORTS (P0A0 AND POA1 PINS) .......................................................

9.3

GENERAL-PURPOSE INPUT PORT (P0B0 TO P0B2 PINS) .......................................................

9.4

GENERAL-PURPOSE OUTPUT PORTS (P0A2, P0A3, P0C0 TO P0C3, AND P0D0 PINS) .......

10. TIMERS .......................................................................................................................................

10.1

OVERVIEW ......................................................................................................................................

10.2

BASIC TIMERS 0 AND 1 ................................................................................................................

11. PLL FREQUENCY SYNTHESIZER ............................................................................................

11.1

GENERAL ........................................................................................................................................

11.2

INPUT SWITCHING BLOCK AND PROGRAMMABLE DIVIDER ................................................

11.3

REFERENCE FREQUENCY GENERATOR ..................................................................................

11.4

PHASE COMPARATOR (

φ-DET), CHARGE PUMP AND UNLOCK DETECTION BLOCK .......

11.5

PLL DISABLED STATE ..................................................................................................................

11.6

PLL FREQUENCY SYNTHESIZER USE .......................................................................................

11.7

STATE AT RESET ..........................................................................................................................

12. BEEP ...........................................................................................................................................

12.1

CONFIGURATION AND FUNCTIONS ...........................................................................................

12.2

STATE AT RESET ..........................................................................................................................

13. LCD CONTROLLER/DRIVER ....................................................................................................

13.1

OVERVIEW ......................................................................................................................................

13.2

LCD DRIVING VOLTAGE GENERATION BLOCK .......................................................................

13.3

LCD SEGMENT REGISTER ...........................................................................................................

13.4

TIMING CONTROL BLOCKS FOR OUTPUTTING COMMON SIGNAL AND

SEGMENT SIGNAL .........................................................................................................................

13.5

COMMON SIGNAL AND SEGMENT SIGNAL OUTPUT WAVEFORMS .....................................

13.6

USING THE LCD CONTROLLER/DRIVER ...................................................................................

13.7

STATE AT RESET ..........................................................................................................................

14. STANDBY ....................................................................................................................................

14.1

STANDBY FUNCTIONS .................................................................................................................

14.2

HALT FUNCTION ............................................................................................................................

14.3

CLOCK-STOP FUNCTION .............................................................................................................

14.4

DEVICE OPERATION IN THE HALT AND CLOCK-STOP STATES ...........................................

14.5

PIN PROCESSING CAUTIONS IN HALT STATE AND CLOCK-STOP STATE .........................

14.6

DEVICE OPERATION CONTROL BY THE CE PIN .....................................................................

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