UPD17015 datasheet(79/120 Pages) NEC

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µPD17015

14.2

HALT FUNCTION

14.2.1

General

The halt function stops the CPU clock by executing a “HALT h” instruction.

When a “HALT h” instruction is executed, the program halts and remains stopped until the halt state is released.

In the halt state, the device current drain is reduced by the amount of the CPU operating current.

The halt state is released by key input or basic timer 0.

The release conditions are specified with the “h” operand of the HALT h instruction.

The “HALT h” instruction is valid regardless of the CE pin input level.

14.2.2

Halt State

In the halt state, all operations of the CPU are stopped. That is, the “HALT h” instruction stops program execution.

However, the peripheral hardware remains in the state set before the “HALT h” is executed.

For an operation description of each hardware device, see Section 14.4.

14.2.3

Halt Release Conditions

Fig. 14-2 shows the halt release conditions.

The halt release conditions are set with the 4-bit data specified by the “h” operand of the “HALT h” instruction.

The halt state is released when the condition set to 1 at the “h” operand is satisfied.

When the halt state is released, the program is executed from the instruction after the “HALT h” instruction.

When multiple release conditions are set, the halt state is released if even one of the set conditions is satisfied.

When reset (power-on reset or CE reset) is applied to the device, the halt state is released and the reset operations

are performed.

When 0000B is set at halt release condition “h”, no halt condition is set. If reset (power-on reset or CE reset) is

applied to the device at this time, the halt state is released.

Fig. 14-2 Halt Release Conditions

Operand

Sets the halt state release conditions.

Release when a high-level signal is input to port 0B (halt release by the key input).

Release when the BTM0CY flag is set (1) (halt release by the basic timer 0).

Undefined (Fix it to 0.)

HALT h (4 bits)

0 : Do not release halt state even if condition satisfied.

1 : Release halt state when condition satisfied.

UPD17015 Datasheet(PDF) 79 Page - NEC