UPD17015 datasheet(41/120 Pages) NEC

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µPD17015

10. TIMERS

The timers in the

µPD17015 are used to manage the time required to execute programs.

10.1

OVERVIEW

Fig. 10-1 shows the block diagrams of the timers.

The

µPD17015 contains the following two different timers.

• Basic timer 0

• Basic timer 1

Basic timers 0 and 1 are realized by detecting the state of a flip-flops that is set at constant intervals, using software.

Fig. 10-1 Overview of Timers

125 ms(8 Hz)

Set/clear

5 ms(200 Hz)

Set/clear

75 kHz

Frequency

divider

Basic timer 0

carry flip-flop

Basic timer 1

carry flip-flop

BTM0CY flag

BTM1CY flag

10.2

BASIC TIMERS 0 AND 1

10.2.1

Overview of Basic Timers 0 and 1

Basic timer 0 is realized by detecting the state of a basic timer 0 carry flip-flop, using the BTM0CY flag (bit 0 at

address 6EH). Basic timer 1 is realized by detecting the state of a basic timer 1 carry flip-flop, using the BTM1CY

flag (bit 0 at address 6FH).

The contents of the flip-flops correspond to the states of the BTM0CY and BTM1CY flags on a one-to-one basis,

respectively.

Time intervals (pulses) at which the BTM0CY and BTM1CY flags are set are as follows:

BTM0CY flag set pulse: 125 ms (8 Hz)

BTM1CY flag set pulse: 5 ms (200 Hz)

When the BTM0CY and BTM1CY flags are read-accessed for the first time after a power-on reset, these flags are

read as 0. Subsequently, the BTM0CY flag is set to 1 after an interval of 125 ms and the BTM1CY flag is set to 1

after an intervals of 5 ms.

Basic timer 0 also controls the timing of the reset (CE reset) by the CE pin.

After the CE pin goes from a low level to a high level, a CE reset occurs simultaneously when the BTM0CY flag

is set next time.

A power failure can therefore be detected by reading the BTM0CY flag when a system reset (power-on or CE reset)

occurs.

See Chapter 15 for power failure detection.

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