UPD17015 datasheet(87/120 Pages) NEC

87 / 120 page

µPD17015

Table 14-1 Device Operation in Halt State and Clock-Stop State

STOP instruction

invalid (NOP)

Notes 1. For the value that is initialized, see Chapter 5.

2. For the value that is initialized, see each section.

14.5

PIN PROCESSING CAUTIONS IN HALT STATE AND CLOCK-STOP STATE

The halt state is used to reduce the supply current when only the clock is operating.

The clock-stop function is used to reduce the supply current for holding only the data memory.

Consequently, the supply current must be reduced as much as possible in the halt and clock-stop states.

The supply current depends on the state of each pin and the cautions shown in Table 14-2 must be observed.

State

Peripheral hardware

CE pin: High level

CE pin: Low level

At halt

At clock-stop

At halt

At clock-stop

Program counter

Stopped at HALT

Initialized to 0000H

instruction address.

and stopped.

System register

InitializedNote 1

Peripheral hardware register

Held

Peripheral control register

InitializedNote 2

Basic timer

Normal operation

PLL frequency synthesizer

Disabled

Operation stopped

BEEP

LCD controller/driver

Normal operation

General-purpose I/O port

Normal operation

Input port

General-purpose input port

Input port

General-purpose output port

Held

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