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AXP223 Datasheet(PDF) 32 Page - List of Unclassifed Manufacturers |
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AXP223 Datasheet(HTML) 32 Page - List of Unclassifed Manufacturers |
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32 / 56 page ![]() AXP223 PMIC Optimized For Multi-Core High-Performance System AXP223 Datasheet Revision 1.1 Copyright © 2013 X-Powers Limited. All Rights Reserved. PAGE 32 10.2.5. REG 12H: Power Output Control Default Value :00H Bit Description R/W Default Value 7 DC1SW enable and disable control 0: disable; 1: enable RW 0 6 DLDO4 enable and disable control RW 0 5 DLDO3 enable and disable control RW 0 4 DLDO2 enable and disable control RW 0 3 DLDO1 enable and disable control RW 0 2 ELDO3 enable and disable control RW 0 1 ELDO2 enable and disable control RW 0 0 ELDO1 enable and disable control RW 0 10.2.6. REG 13H: Power Output Control Default Value :81H Bit Description R/W Default Value 7 ALDO3 enable and disable control 0: disable; 1: enable RW 1 6-0 Reserved and unchangeable 10.2.7. REG 15H:DLDO1 Output Voltage Setting Default Value :00H Bit Description R/W Default Value 7-5 Reserved and unchangeable 4 DLDO1 output voltage setting Bit4 0.7-3.3V,100mV/step RW 0 3 DLDO1 output voltage setting Bit3 RW 0 2 DLDO1 output voltage setting Bit2 RW 0 1 DLDO1 output voltage setting Bit1 RW 0 0 DLDO1 output voltage setting Bit0 RW 0 10.2.8. REG 16H:DLDO2 Output Voltage Setting Default Value :00H Bit Description R/W Default Value 7-5 Reserved and unchangeable 4 DLDO2 output voltage setting Bit4 0.7-3.3V,100mV/step RW 0 3 DLDO2 output voltage setting Bit3 RW 0 2 DLDO2 output voltage setting Bit2 RW 0 1 DLDO2 output voltage setting Bit1 RW 0 0 DLDO2 output voltage setting Bit0 RW 0 |
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