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AXP223 Datasheet(PDF) 39 Page - List of Unclassifed Manufacturers |
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AXP223 Datasheet(HTML) 39 Page - List of Unclassifed Manufacturers |
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39 / 56 page ![]() AXP223 PMIC Optimized For Multi-Core High-Performance System AXP223 Datasheet Revision 1.1 Copyright © 2013 X-Powers Limited. All Rights Reserved. PAGE 39 10.2.25. REG 31H: Wakeup control and VOFF Power off Voltage Setting Default Value :03H Bit Description R/W Default Value 7 If PWROK is pulled low in the wake process 0:No 1: Yes RW 0 6 Soft reboot control, write 1 in this bit then PMU will restart, and bit is automatically cleared RW 0 5 software wake control , write 1 in bit then each output will resume, and bit is automatically cleared RW 0 4 when enable wakeup function ,if IRQ enable wakeup, if masked in wakeup process 0:IRQ enable wakeup,and masked in wakeup process 1:IRQ working ,but disable wakeup RW 0 3 wakeup function enable setting in Sleep mode 0:disable 1:enable This bit will be automatically cleared to 0 after writing,so “1 ”should be rewritten whenever enters the Sleep mode. RW 0 2 V OFF Set Bit2 000-2.6V ; 001-2.7V; 010-2.8V; 011- RW 0 1 V OFF Set Bit1 2.9V ; 100-3.0V; 101-3.1V; RW 1 0 V OFF Set Bit0 110-3.2V ; 111-3.3V RW 1 10.2.26. REG 32H: Shutdown Setting, Battery Detection and CHGLED Pin Control Default Value :43H Bit Description R/W Default Value 7 Shutdown Control Writing “1” to this bit will disable the AXP223 output,expect RTC and charging module RW 0 6 Battery monitoring function setting bit: 0: disable; 1: enable RW 1 5-4 CHGLED pin function setting 00: high resistance 01: 25% 0.5Hz flicker 10: 25% 2Hz flicker 11: low level output RW 00 3 CHGLED pin control setting 0: controlled by register REG 32H[5:4] 1: controlled by charging RW 0 2 Output disable timing control 0: disable at the same time 1: contrary to the startup timing RW 0 1-0 PWROK start delay time compare last power output 00: 8ms; 01: 16ms; 10: 32ms; 11: 64ms RW 11 |
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