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PEB2256HT Datasheet(PDF) 132 Page - Infineon Technologies AG |
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PEB2256HT Datasheet(HTML) 132 Page - Infineon Technologies AG |
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132 / 490 page ![]() FALC56 V1.2 PEB 2256 Functional Description T1/J1 Data Sheet 132 2002-08-27 Figure 47 gives an idea of operation of the receive elastic buffer: A slip condition is detected when the write pointer (W) and the read pointer (R) of the memory are nearly coincident, i.e. the read pointer is within the slip limits (S +, S –). If a slip condition is detected, a negative slip (one frame or one half of the current buffer size is skipped) or a positive slip (one frame or one half of the current buffer size is read out twice) is performed at the system interface, depending on the difference between RCLK and the current working clock of the receive backplane interface, i.e. on the position of pointer R and W within the memory. A positive/negative slip is indicated by the interrupt status bits ISR3.RSP and ISR3.RSN. Table 31 Receive Buffer Operation Modes (T1/J1) Buffer Size (SIC1.RBS1/0) TS Offset program. (RC1/0) + SYPR = input Slip perform. bypass 1) 1) In bypass mode the clock provided on pin SCLKR is ignored. Clocking is done with RCLK. disabled no short buffer not recommended, recommended: SYPR = output yes 1 frame not recommended, recommended: SYPR = output yes 2 frames enabled yes |
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