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PEB2256HT Datasheet(PDF) 164 Page - Infineon Technologies AG |
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PEB2256HT Datasheet(HTML) 164 Page - Infineon Technologies AG |
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164 / 490 page  FALC56 V1.2 PEB 2256 Functional Description T1/J1 Data Sheet 164 2002-08-27 Table 43 Bit Functions in Periodical Performance Report 1) 1) according to ANSI T1.403 Bit Value Interpretation G1 = 1 number of CRC error events = 1 G2 = 1 1 < number of CRC error events ≤ 5 G3 = 1 5 < number of CRC error events ≤ 10 G4 = 1 10 < number of CRC error events ≤ 100 G5 = 1 100 < number of CRC error events ≤ 319 G6 = 1 number of CRC error events ≥ 320 SE = 1 Severely errored framing event ≥ 1 (FE shall be 0) FE = 1 Frame synchronization bit error event ≥ 1 (SE shall be 0) LV = 1 Line code violation event ≥ 1 SL = 1 Slip event ≥ 1 LB = 1 Payload loop-back activated U1 not used (default value = 0) U2 not used (default value = 0) R not used (default value = 0) NmNi One-second report modulo 4 counter |
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