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GS1671 Datasheet(PDF) 104 Page - Semtech Corporation

Part # GS1671
Description  HD/SD SDI Receiver, with Integrated Adaptive Cable Equalizer complete with SMPTE Audio and Video Processing
PDF  130 Pages
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Manufacturer  SEMTECH [Semtech Corporation]
Direct Link  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

GS1671 Datasheet(HTML) 104 Page - Semtech Corporation

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GS1671 HD/SD SDI Integrated Receiver
Data Sheet
53737 - 2
September 2012
104 of 130
476hACSR3_4B_BYTE
12_13
ACSR3_4B_12
15-0
Bytes 12 [7:0] and 13 [15:8] of
audio group B channel status for
channels 3 and 4.
R0
477h
ACSR3_4B_BYTE
14_15
ACSR3_4B_14
15-0
Bytes 14 [7:0] and 15 [15:8] of
audio group B channel status for
channels 3 and 4.
R0
478h
ACSR3_4A_BYTE
16_17
ACSR3_4B_16
15-0
Bytes 16 [7:0] and 17 [15:8] of
audio group B channel status for
channels 3 and 4.
R0
479h
ACSR3_4A_BYTE
18_19
ACSR3_4B_18
15-0
Bytes 18 [7:0] and 19 [15:8] of
audio group B channel status for
channels 3 and 4.
R0
47Ah
ACSR3_4A_BYTE
20_21
ACSR3_4B_20
15-0
Bytes 20 [7:0] and 21 [15:8] of
audio group B channel status for
channels 3 and 4.
R0
47Bh
ACSR3_4A_BYTE
22
RSVD
15-8
Reserved.
R/W
0
ACSR3_4B_22
7-0
Bytes 22 of audio group B channel
status for channels 3 and 4.
R0
47Ch -
47Fh
RSVD
RSVD
15-0
Reserved.
R/W
0
480h
ACSR_BYTE_0
ACSR_BYTE0
7-0
Audio channel status to use when
ACS_REGEN is set or when adding
audio channel status to
non-AES/EBU audio. 8 bits per
register for 23 registers.
R0
481h
ACSR_BYTE_1
ACSR_BYTE1
7-0
−
W0
482h
ACSR_BYTE_2
ACSR_BYTE2
7-0
−
W0
483h
ACSR_BYTE_3
ACSR_BYTE3
7-0
−
W0
484h
ACSR_BYTE_4
ACSR_BYTE4
7-0
−
W0
485h
ACSR_BYTE_5
ACSR_BYTE5
7-0
−
W0
486hACSR_BYTE_6
ACSR_BYTE6
7-0
−
W0
487h
ACSR_BYTE_7
ACSR_BYTE7
7-0
−
W0
488h
ACSR_BYTE_8
ACSR_BYTE8
7-0
−
W0
489h
ACSR_BYTE_9
ACSR_BYTE9
7-0
−
W0
48Ah
ACSR_BYTE_10
ACSR_BYTE10
7-0
−
W0
48Bh
ACSR_BYTE_11
ACSR_BYTE11
7-0
−
W0
48ChACSR_BYTE_12
ACSR_BYTE12
7-0
−
W0
48Dh
ACSR_BYTE_13
ACSR_BYTE13
7-0
−
W0
48Eh
ACSR_BYTE_14
ACSR_BYTE14
7-0
−
W0
48Fh
ACSR_BYTE_15
ACSR_BYTE15
7-0
−
W0
490h
ACSR_BYTE_16
ACSR_BYTE16
7-0
−
W0
Table 4-29: SD Audio Core Configuration and Status Registers (Continued)
Address
Register Name
Bit Name
Bit
Description
R/W
Default



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