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Z80 Datasheet(PDF) 282 Page - Zilog, Inc. |
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Z80 Datasheet(HTML) 282 Page - Zilog, Inc. |
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282 / 330 page ![]() <%27 2GTKRJGTCNU 7UGT /CPWCN UM008101-0601 Serial Input/Output 262 In all modes, characters are sent with the least-significant bits first. This requires right justification of data to be transmitted when the word length is less than eight bits. If the word length is five bits or less, use the special technique described in “Write Register 5” on page 289. Because the number of bits/character can be changed on-the-fly, the data field can be filled with any number of bits. When used in conjunction with the Receiver Residue codes, the Z80 SIO can receive a message that has a variable I-field and retransmit it exactly as received with no previous infor- mation about the character structure of the I-field (if any). A change in the number of bits does not affect the character being shifted out. Characters are sent with the number of bits programmed at the time that the character is loaded from the transmit buffer to the transmitter. If the External/Status Interrupt Enable is set, transmitter conditions, such as “startingtosendCRC characters,”“starting to send flag characters,” and CTS changing state, cause interrupts, having a unique vector if Status Affects Vector is set. All interrupts can be disabled for operation in a polled mode. Table 9 describes the typical program steps that implement the half-duplex SDLC Transmit mode. Table 9. SDLC Transmit Mode Function Typical Program Steps Comments Register Information loaded: Initialize WR0 Channel Reset Reset SIO WR0 Pointer 2 WR2 Interrupt Vector Channel B only WR0 Pointer 3 WR3 Auto Enables Transmitter sends data only after CTS is detected WR0 Pointer 4, Reset External/status Interrupts |
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