Z80 datasheet(286/330 Pages) ZILOG

286 / 330 page

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7UGT /CPWCN

UM008101-0601

Serial Input/Output

266

Because the control field of the frame is transparent to the Z80 SIO, it is

transferred to the CPU as a data character. Extra zeros inserted in the data

stream are automatically deleted; flags are not transferred to the CPU.

Data Transfer and Status Monitoring

After receipt of a valid flag, the assembled characters are transferred to the

receive data FIFO. The following four interrupt modes are available to

transfer this data and its associated status.

No Interrupts Enabled

This mode is used for purely polled operations or for off-line conditions.

Interrupt On First Character Only

Use this mode to start a software polling loop or a Block Transfer instruc-

tion using WAIT/READY to synchronize the CPU or FNMA device to the

incoming data rate. In this mode, the Z80 SIO interrupts on the first char-

acter and thereafter only interrupts if Special Receive conditions are

detected. The mode is reinitialized by the Enable Interrupt On Next

Receive Character Command.

The first character received after this command is issued causes an inter-

rupt. If External/Status interrupts are enabled, they may interrupt any time

the DCD input changes state. Special Receive conditions such as End-of-

Frame and Receiver overrun also cause interrupts. The End-of-Frame inter-

rupt can be used to exit the Block Transfer mode.

Interrupt On Every Character

An interrupt is generated whenever the receive FIFO contains a character.

Error and Special Receive conditions generate a special vector if Status

Affects vector is selected.

Z80 Datasheet(PDF) 286 Page - Zilog, Inc.