| Electronic Components Datasheet Search |
|
Z80 Datasheet(PDF) 287 Page - Zilog, Inc. |
|
|
|||||||||||||||||||||||||||||
Z80 Datasheet(HTML) 287 Page - Zilog, Inc. |
|
287 / 330 page ![]() Z80 CPU Peripherals User Manual UM008101-0601 Serial Input/Output 267 Special Receive Condition Interrupts The Special Receive Condition interrupt is not, as such, a separate interrupt mode. Before the Special Receive condition can cause an interrupt, either Interrupt On First Receive Character only or Interrupt On Every Character must be selected. The Special Receive Condition interrupt is caused by a Receive Overrun or End-of-Frame detection. When the Receive Overrun status bit is latched, the error status read indicates that an error occurred in the current word in the receive buffer in addition to any errors received after the last Error Reset command. The Receive overrun status bit can only be reset by the Error Reset command. The End-of-Frame status bit indicates that a valid ending flag has been received and that the CRC Error and Residue codes are also valid. Character length may be changed on-the-fly. If the address and control bytes are processed as 8-bit characters, the receiver may be switched to a shorter character length while the first information character is being assembled. This change must be made fast enough so that it is effective before the number of bits specified for the character length have been assembled. For example, if the change is to be from the 8-bit control field to a 7-bit information field, the change must be made before the first seven bits of the I-Field are assembled. SDLC Receive CRC Checking Control of the receive CRC checker is automatic. It is reset by the leading flag and CRC is calculated up to the final flag. The byte that has the End-of- Frame bit set is the byte that contains the result of the CRC check. If the CRC/Framing Error bit is not set, the CRC indicates a valid message. A special check sequence is used for the SDLC check because the transmitted CRC check is inverted. The final check must be 0001 1101 0000 1111. The 2-byte CRC check characters must be read by the CPU and discarded because the Z80 SIO, while using them for CRC checking, treats them as ordinary data. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |