Z80 datasheet(300/330 Pages) ZILOG

300 / 330 page

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7UGT /CPWCN

UM008101-0601

Serial Input/Output

280

data. The Wait function is selected by setting D6 to 0. If this bit is 0, the

WAIT/READY output is in the open-drain state and goes Low when active.

Both the Wait and Ready functions can be used in either the Transmit or

Receive modes, but not both simultaneously. If D5 (Wait/Ready on Receive/

Transmit) is set to 1, the Wait/Ready function responds to the condition of

the receive buffer (empty or full). If D5 is set to 0, the Wait/Ready function

responds to the condition of the transmit buffer (empty or full).

The logic states of the WAIT/READY output, which are either active or

inactive, depend on the combination of modes selected. Table 18 summa-

rizes these combinations.

The WAIT output High-to-Low transition occurs at the delay time

tDIC(WR) after the I/O request. The Low-to-High transition occurs at the

delay tDH

Φ(WR) at the falling edge of Φ. The READY output High-to-

Low transition occurs at the delay tDL

Φ(WR) at the rising edge of Φ.The

READY output Low-to-High transition occurs at the delay tDIC(WR)

after IORQ falls.

The Ready function can occur when the Z80 SIO is not selected. When

the READY output becomes active Low, the DMA controller issues

Table 18. Wait/Ready Functions

If D7 = 0

and D6 = 1

and D6 = 0

READY is High

WAIT

is floating

If D7 = 0

and D5 = 0

and D5 = 1

READY is High when transmit buffer is full

READY is High when receive buffer is empty

WAIT

is low when transmit buffer is full and

S10data portis anselected

WAIT

is Low when receive buffer is empty

and SID data port is selected

READY is Low when transmit buffer is empty

READY is Low when receive buffer is full

WAIT

is floating when transmit buffer is empty WAIT

is floating when receive buffer is full

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