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Z80 Datasheet(PDF) 304 Page - Zilog, Inc. |
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Z80 Datasheet(HTML) 304 Page - Zilog, Inc. |
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304 / 330 page  <%27 2GTKRJGTCNU 7UGT /CPWCN UM008101-0601 Serial Input/Output 284 Figure 117. Write Register 3 Receiver Bits/Characters 1 and 0 (D7 and D6) Used together, these bits determine the number of serial receive bits assembled to form a character. Both bits may be changed during the time that a character is being assembled, but they must be changed before the currently programmed number of bits is reached. Write Register 4 WR4 contains the control bits that affect both the receiver and transmitter. In the transmit and receive initialization routine, these bits should be set before issuing WR1,WR3,WR5,WR6, and WR7. Table 21. Serial Bits/Character D7 D6 Bits/Character 00 5 01 7 10 6 11 8 Rx Enable SYNC Character Load Inhibit Address Search Mode (SDLC) Rx CRC Enable D7 D6 D5 D4 D3 D2 D1 D0 Enter Hunt Phase Auto Enables 00 01 10 11 Rx 5 Bits/Character Rx 7 Bits/Character Rx 6 Bits/Character Rx 8 Bits/Character |
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