AD7779 datasheet(46/97 Pages) AD

46 / 97 page

AD7779

Data Sheet

Rev. 0 | Page 46 of 97

-∆ ADC Errors

Reference Detect (SPI Control Mode)

In SPI control mode, the AD7779 includes on-chip circuitry to

detect if there is a valid reference for conversions or calibrations. If

the voltage between the selected REFx+ and REFx– pins goes

below 0.7 V, the AD7779 detects that it no longer has a valid

reference. CHx_ERR_REF_DET can be interrogated to identify

the affected channel, which clears the bit register if the error is

no longer present. The voltage detector can be disable by

clearing the REF_DET_TEST_EN bit.

Use the -Δ ADC diagnostic or the SAR ADC to verify the error.

Overvoltage and Undervoltage Events

The AD7779 includes on-chip overvoltage/undervoltage

circuitry on each analog input pin. When the voltage on an

analog input pin goes above AVDD1x + 0.04 mV, the CHx_

ERR_AINx_OV bit is set. The error disappears if the input

voltage falls below AVDD1x – 40 mV.

If an undervoltage event occurs (AVSSx – 40 mV), the CHx_

ERR_AINx_UV bit is set. The error disappears if the input

voltage increases to AVSSx + 0.04 V.

The CHx_ERR_AINM_UV, CHx_ERR_AINM_OV, CHx_ERR_

AINP_UV, and CHx_ERR_AINP_OV bits can be read back to

verify the affected channel input, which clears the bit register if

the error is no longer present. The overvoltage and undervoltage

detection can be disabled independently by clearing the AINM_

UV_TEST_EN, AINM_OV_TEST_EN, AINP_UV_TEST_EN,

or AINP_OV_TEST_EN bits.

The input voltage can be checked independently with the SAR

ADC.

Modulator Saturation

The AD7779 includes modulator saturation detection on each

of the -Δ ADCs. If 20 consecutive codes for the modulator are

either all 1s or 0s, this is flagged as a modulator saturation event.

Reading the CHx_ERR_MOD_SAT register clears the bit if the

error corrects itself.

Modulator saturation detection can be disabled by clearing the

MOD_SAT_TEST_EN bit.

Note that the modulator input voltage is attenuated internally,

which means that a modulator output of all 1s or 0s represents a

modulator that is out of bounds and that a RESET pulse is required.

Filter Saturation

TheAD7779 includes digital filter saturation detection on each

-Δ ADC channel. This detection indicates that the filter output is

out of bounds, which represents an output code approximately 20%

higher than positive or negative full scale. Reading the CHx_ERR_

FILTER_SAT bit clears the bit if the error corrects itself.

The detection can be disabled by clearing FILTER_SAT_TEST_

EN bit.

Output Saturation

An output saturation event can occur when gain and offset

calibration causes the output from the digital filter to clip at

either positive or negative full scale. The output does not wrap.

Reading the CHx_ERR_OUTPUT_SAT bit clears the bit if the

error corrects itself.

The detection can be disabled by clearing OUTPUT_SAT_

TEST_EN bit.

SPI Transmission Errors (SPI Control Mode)

All SPI errors clear after reading GEN_ERR_REG_1, which

contains the SPI errors. These errors are not recovered auto-

matically and, consequently, the ALERT pin and the ALERT bit

remain set until the error register is read back.

CRC Checksum Error

If the CRC checksum is enabled by setting the SPI_CRC_

TEST_EN bit, an error bit, SPI_CRC_ERR, is raised if the CRC

message does not match the message computed by the AD7779

internal CRC block. If the CRC message does not match the

internally computed message, the register is not updated.

SCLK Counter

If the number of clocks generated by the controller is not a

multiple of 8 after CS is pulled high, an error bit, SPI_CLK_

COUNT_ERR is raised. The last command multiple of 8 is

executed; however, the SCLK counter can be disabled by setting

the SPI_CLK_COUNT_TEST_EN bit.

Invalid Read

When an invalid register is trying to read back, the SPI_INVALID_

READ_ERR bit is set.

The invalid readback address detection can be disabled by

setting the SPI_INVALID_READ_TEST_EN bit.

Invalid Write

When an invalid register is trying to write, the SPI_INVALID_

WRITE_ERR bit is set.

The invalid write address detection can be disabled by setting

the SPI_INVALID_WRITE_TEST_EN bit.

MONITORING USING THE AD7779 SAR ADC

(SPI CONTROL MODE)

The AD7779 contains an on-chip SAR ADC for chip diagnostics,

system diagnostics, or measurement verification. The SAR ADC

has a 12-bit resolution. The AVDD4 and AVSS4 pins operate in

complete independence of the -Δ ADC supplies and, therefore,

can be used for chip diagnostics in systems where functional

safety is important. The reference for the SAR conversion

process is taken from the SAR ADC supply voltage (AVDD4/

AVSS4) and, therefore, the SAR analog input range is from AVSS4

to AVDD4.

The SAR ADC has a maximum throughput rate of 256 kSPS.

The CONVST_SAR pin initiates a conversion on the SAR ADC.

The maximum allowable frequency of the CONVST_SAR pin is

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