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TAS3002 Datasheet(PDF) 19 Page - Texas Instruments

Part # TAS3002
Description  Digital Audio Processor With Codec
PDF  74 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TAS3002 Datasheet(HTML) 19 Page - Texas Instruments

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2–5
2.3
Switching Characteristics
PARAMETER
MIN
TYP
MAX
UNIT
tc(SCLK)
SCLK cycle time
325.5
ns
td(SLR)
SCLK rising to LRCLK edge
20
ns
td(SDOUT)
SDOUT valid from SCLK falling edge (see Note 1)
(1/256fS) + 10
ns
tsu(SDIN)
SDIN setup before SCLK rising edge
20
ns
th(SDIN)
SDIN hold after SCLK rising edge
100
ns
f(LRCLK)
LRCLK frequency
32
44.1
48
kHz
Duty cycle
50
%
NOTE 1: Maximum of 50-pF external load on SDOUT.
SCLK
LRCLK
SDIN1
SDIN2
SDOUT1
SDOUT2
SDOUT0
tc(SCLK)
td(SDOUT)
tsu(SDIN)
th(SDIN)
td(SLR)
tf(SCLK)
tr(SCLK)
td(SLR)
Figure 2–4. For Right-/Left-Justified and I2S Serial Protocols



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