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CS8900A Datasheet(PDF) 125 Page - Cirrus Logic

Part # CS8900A
Description  Crystal LAN ??ISA Ethernet Controller
PDF  128 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS8900A Datasheet(HTML) 125 Page - Cirrus Logic

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DS271PP3
125
CS8900A
Crystal LAN™ ISA Ethernet Controller
CIRRUS LOGIC PRODUCT DATA SHEET
9.3 Acronyms Specific to the CS8900A
BufCFG
Buffer Configuration - Register B
BufEvent
Buffer Event - Register C
BusCTL
Bus Control - Register 17
BusST
Bus State - Register 18
ENDEC
Manchester encoder/decoder
ISQ
Interrupt Status Queue - register 0
LineCTL
Ethernet Line Control - Register 13
LineST
Ethernet Line Status - Register 14
RxCFG
Receive Configuration - Register 3
RxCTL
Receive Control - Register 5
RxEvent
Receive Event - Register 4
SelfCTL
Self Control - Register 15
SelfST
Self Status - Register 16
TestCTL
Test Control - Register 19
TxCFG
Transmit Configuration - Register 7
TxCMD
Transmit Command - Register 9
TxEvent
Transmit Event - Register 8
9.4 Terms Specific to the CS8900A
Act-Once bit
A control bit that causes the CS8900A to take a certain action once when a logic "1" is written
to that bit. To cause the action again, the host must rewrite a "1".
Committed Receive Frame
A receive frame is said to be "committed" after the frame has been buffered by the CS8900A,
and the host has been notified, but the frame has not yet been transferred by the host.
Committed Transmit Frame
A transmit frame is said to be "committed" after the host has issued a Transmit Command, and
the CS8900A has reserved buffer space and notified the host that it is ready for transmit.
Event or Interrupt Event
The term "Event" is used in this document to refer to something that can trigger an interrupt.
Items that are considered "Events" are reported in the three Event registers (RxEvent, TxEvent,
or BufEvent) and in two counter-overflow bits (RxMISS and TxCOL).
StreamTransfer
A method used to significantly reduce the number of interrupts to the host processor during
block data transfers (Patent Pending).
PacketPage
A unified, highly-efficient method of controlling and getting status of a peripheral controller in
I/O or Memory space.



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