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PXA270 Datasheet(PDF) 1 Page - Intel Corporation |
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PXA270 Datasheet(HTML) 1 Page - Intel Corporation |
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1 / 126 page  Intel® PXA270 Processor Electrical, Mechanical, and Thermal Specification Data Sheet n High-performance processor: —Intel XScale® microarchitecture with Intel® Wireless MMX™ Technology —7 Stage pipeline —32 KB instruction cache —32 KB data cache —2 KB “mini” data cache —Extensive data buffering n 256 Kbytes of internal SRAM for high speed code or data storage preserved during low-power states n High-speed baseband processor interface (Mobile Scalable Link) n Rich serial peripheral set: —AC’97 audio port —I2S audio port —USB Client controller —USB Host controller —USB On-The-Go controller —Three high-speed UARTs (two with hardware flow control) —FIR and SIR infrared communications port n Hardware debug features — IEEE JTAG interface with boundary scan n Hardware performance-monitoring features with on-chip trace buffer n Real-time clock n Operating-system timers n LCD Controller n Universal Subscriber Identity Module interface n Low power: —Wireless Intel Speedstep® Technology —Less than 500 mW typical internal dissipation —Supply voltage may be reduced to 0.85 V —Four low-power modes —Dynamic voltage and frequency management n High-performance memory controller: —Four banks of SDRAM: up to 104 MHz @ 2.5V, 3.0V, and 3.3V I/O interface —Six static chip selects —Support for PCMCIA and Compact Flash —Companion chip interface n Flexible clocking: —CPU clock from 104 to 624 MHz —Flexible memory clock ratios —Frequency changes —Functional clock gating n Additional peripherals for system connectivity: —SD Card / MMC Controller (with SPI mode support) —Memory Stick card controller —Three SSP controllers —Two I2C controllers —Four pulse-width modulators (PWMs) —Keypad interface with both direct and matrix keys support —Most peripheral pins double as GPIOs Order Number 280002-002 |
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