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PXA270 Datasheet(PDF) 40 Page - Intel Corporation |
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PXA270 Datasheet(HTML) 40 Page - Intel Corporation |
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40 / 126 page  4-20 Electrical, Mechanical, and Thermal Specification Intel® PXA270 Processor Pin Listing and Signal Definitions A22 B20 GPIO<118 > ICOC Z GPIO<118> SDA — — Pu-1 Note[1] Note [3], Note[12] SDA — — VCC_USB B22 D18 USBC_P IAOA Z USBC_P USBC_P — — Hi-Z Hi-Z C20 E19 USBC_N IAOA Z USBC_N USBC_N — — Hi-Z Hi-Z E22 E22 USBH_P <1> IAOA Z USBH_P<1 > USBH_P<1> — — Hi-Z Hi-Z D23 D22 USBH_N <1> IAOA Z USBH_N<1 > USBH_N<1> — — Hi-Z Hi-Z VCC_USIM F22 H19 GPIO<90> ICOC Z GPIO<90> KP_MKIN<5> USB_P3_5 CIF_DD<4> Pd-0 Note[1] Note [3] —nURST — F23 G19 GPIO<91> ICOC Z GPIO<91> KP_MKIN<6> USB_P3_1 CIF_DD<5> Pd-0 Note[1] Note [3] —UCLK — E23 F20 UIO ICOC Z UIO UIO — — Driven Low Hi-Z VCC_REG V22 U20 GPIO<0> ICOC Z GPIO<0> GPIO<0> — — Pd-0 Note[1] Note [3] Y24 U21 GPIO<1> ICOC Z GPIO<1> GPIO<1> — — Pu-1 Note[1] Note [7] W21 V22 GPIO<3> ICOC Z GPIO<3> PWR_SCL — — Pu-1 Note[1] Hi-Z W23 T19 GPIO<4> ICOC Z GPIO<4> PWR_SDA — — Pu-1 Note[1] Hi-Z U22 T22 GPIO<9> Note [18] ICOC Z GPIO<9> Note [18] — — FFCTS Pd-0 Note[1] Note [7] HZ_CLK — CHOUT<0> V23 U22 GPIO<10> Note [18] ICOC Z GPIO<10> Note [18] FFDCD —USB_P3_5 Pd-0 Note[1] Note [7] HZ_CLK — CHOUT<1> Pd-0 Note[1] Note [7] W24 T21 CLK_REQ ICOC Z CLK_REQ CLK_REQ — — Pu-1 Note [8] Y22 W20 NRESET IC nRESET nRESET — — Input - Note [9] Input Y21 W21 NRESET_ OUT OC nRESET_O UT nRESET_OUT — — Low Note [8] AB23 V19 BOOT_SE L IC BOOT_SEL BOOT_SEL — — Input Input Table 4-1. Pin Usage Summary (Sheet 11 of 17) VF-BGA Ball# (13x13) PBGA Ball# (23x23) Name Type Function After Reset Primary Function Secondary Alternate Function Third Alternate Function Reset State Sleep State NOTE: Refer to Table 4-2 for Numbered Notes on Reset and Sleep States. |
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