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PXA270 Datasheet(PDF) 34 Page - Intel Corporation |
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PXA270 Datasheet(HTML) 34 Page - Intel Corporation |
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34 / 126 page  4-14 Electrical, Mechanical, and Thermal Specification Intel® PXA270 Processor Pin Listing and Signal Definitions AC14 Y12 GPIO<52> ICOC Z GPIO<52> CIF_DD<4> SSPSCLK<3> — Pd-0 Note[1] Note [3] BB_OB_CLK SSPSCLK<3> — AB14 AA12 GPIO<53> ICOC Z GPIO<53> FFRXD USB_P2_3 — Pd-0 Note[1] Note [3] BB_OB_STB CIF_MCLK SSPSYSCL K AA14 AB13 GPIO<54> ICOC Z GPIO<54> — BB_OB_WAIT CIF_PCLK Pd-0 Note[1] Note [3] nPCE<2> — AA10 W9 GPIO<55> ICOC Z GPIO<55> CIF_DD<1> BB_IB_DAT<1> — Pu-1 Note[1] Note [5] —nPREG — AB11 AB8 GPIO<56> ICOC Z GPIO<56> nPWAIT BB_IB_DAT<2> — Pu-1 Note[1] Note [5] USB_P3_4 — — AC11 AB9 GPIO<57> ICOC Z GPIO<57> nIOIS16 BB_IB_DAT<3> — Pu-1 Note[1] Note [5] — — SSPTXD AB12 W10 GPIO<81> ICOC Z GPIO<81> — CIF_DD<0> — Pu-1 Note[1] Note [3] SSPTXD3 BB_OB_DAT<0 > — AD9 AA8 GPIO<82> ICOC Z GPIO<82> SSPRXD3 BB_IB_DAT<0> CIF_DD<5> Pu-1 Note[1] Note [3] —— FFDTR AD10 AB10 GPIO<83> ICOC Z GPIO<83> SSPSFRM3 BB_IB_CLK CIF_DD<4> Pd-0 Note[1] Note [3] SSPSFRM3 FFTXD FFRTS AA11 Y10 GPIO<84> ICOC Z GPIO<84> SSPSCLK3 BB_IB_STB CIF_FV Pd-0 Note[1] Note [3] SSPSCLK3 — CIF_FV AC12 AA10 GPIO<85> ICOC Z GPIO<85> FFRXD DREQ<2> CIF_LV Pd-0 Note[1] Note [3] nPCE<1> BB_IB_WAIT CIF_LV VCC_LCD T24 P20 GPIO<14> ICOC Z GPIO<14> L_VSYNC SSPSFRM2 — Pd-0 Note[1] Note [3] — SSPSFRM2 UCLK R22 P19 GPIO<19> ICOC Z GPIO<19> SSPSCLK2 — FFRXD Pd-0 Note[1] Note [3] SSPSCLK2 L_CS nURST G24 G20 GPIO<58> ICOC Z GPIO<58> — LDD<0> — Pd-0 Note[1] Note [3] — LDD<0> — G22 H20 GPIO<59> ICOC Z GPIO<59> — LDD<1> — Pd-0 Note[1] Note [3] — LDD<1> — G23 G21 GPIO<60> ICOC Z GPIO<60> — LDD<2> — Pd-0 Note[1] Note [3] — LDD<2> — Table 4-1. Pin Usage Summary (Sheet 5 of 17) VF-BGA Ball# (13x13) PBGA Ball# (23x23) Name Type Function After Reset Primary Function Secondary Alternate Function Third Alternate Function Reset State Sleep State NOTE: Refer to Table 4-2 for Numbered Notes on Reset and Sleep States. |
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