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TMS320VC5502 Datasheet(PDF) 160 Page - Texas Instruments |
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TMS320VC5502 Datasheet(HTML) 160 Page - Texas Instruments |
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160 / 189 page  www.ti.com M3, M12 M2, M12 M1, M11 M13 M14 M4 M4 M15 M16 M17 M18 Bit (n-1) (n-2) (n-3) (n-4) Bit (n-1) (n-2) (n-3) Bit (n-1) (n-2) M17 M18 M17 M18 CLKR FSR (Int) FSR (Ext) DR (RDATDLY=00b) DR (RDATDLY=01b) DR (RDATDLY=10b) M3, M12 M2, M12 M1, M11 M13 M14 M5 M5 M19 M20 M10 M9 M7 M7 M7 M8 M6 M8 Bit 0 Bit (n−1) (n−2) (n−3) (n−4) Bit 1 Bit 2 Bit (n−1) (n−2) (n−3) Bit (n−1) (n−2) CLKX FSX (Int) FSX (Ext) DX (XDATDLY=00b) DX (XDATDLY=01b) DX (XDATDLY=10b) Bit 0 Bit 0 Bit 1 A. This figure does not include first or last frames. For first frame, no data will be present before frame synchronization. For last frame, no data will be present after frame synchronization. TMS320VC5502 Fixed-Point Digital Signal Processor SPRS166H – APRIL 2001 – REVISED NOVEMBER 2004 Figure 5-32. McBSP Receive Timings Figure 5-33. McBSP Transmit Timings 160 Specifications |
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