DM9008 datasheet(5/68 Pages) ETC

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DM9008

ISA/Plug & Play Super Ethernet Contoller

Final

Version :DM9008-DS-F02

June 14, 2000

Pin Description

Pin No.

Symbol

I/O

Description

PC ISA BUS INTERFACE PINS

96 - 99

3 - 5

11 - 13

15 - 18

20, 22

SA0 - SA3

SA4 - SA6

SA7

SA8

SA9 - SA11

SA14 - SA17

SA18, SA19

SYSTEM ADDRESS: These signals are connected to the address

bus of the PC I/O slot. They are used to select the DM9008 I/O ports

or the boot ROM address

26 - 33

88 - 81

SD0 - SD7

SD8 - SD15

I/O, Z

SYSTEM DATA: These signals are connected to the data bus of the

PC I/O bus slot. They are used to transfer data between the PC and

the DM9008

BALE

ADDRESS LATCH ENABLE: PC ISA bus BALE signal; used only to

define the timing of IOCHRDY in Remote DMA

This pin is not used if the value of biteA of CRB is 0, and tie to high to

prevent floating.

SYSCLK

SYSTEM CLOCK: PC ISA bus system clock

This pin is not used if the value of biteA of CRB is 0, and tie to high to

prevent floating.

IOR

I/O READ: An active low signal used to read data from the DM9008

IOW

I/O WRITE: An active low signal used to write data to the DM9008

SMEMR

MEMORY READ: An active low signal used to read boot ROM data

RST

RESET: An active high signal used to power-on reset the DM9008

AEN

ADDRESS ENABLE: This is an active low signal used to enable the

system address for the DM9008

IOCHRDY

O I, Z

I/O CHANNEL READY: The DM9008 sets this signal low to insert

wait states into the PC ISA bus

MEMW

MEMORY WRITE: PC ISA bus memory write signal

This pin is not used if the value of biteA of CRB is 0, and tie to high to

prevent floating.

MEMR

MEMORY READ: PC ISA bus memory read signal

This pin is not used if the value of biteA of CRB is 0, and tie to high to

prevent floating.

IO16

O, Z

16-BIT I/O: This signal goes low when the data transfer between the

DM9008 and the PC ISA bus is word wide

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