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DM9008 Datasheet(PDF) 61 Page - List of Unclassifed Manufacturers |
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DM9008 Datasheet(HTML) 61 Page - List of Unclassifed Manufacturers |
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61 / 68 page ![]() DM9008 ISA/Plug & Play Super Ethernet Contoller Final 61 Version :DM9008-DS-F02 June 14, 2000 2. Oscillator The oscillator is controlled by a 20 Mhz parallel resonant crystal connected between X1 and X2 or by an external clock on X2. The 20 Mhz output of the oscillator is divided by 2 to generate the 10 MHz transmit clock for the controller. The oscillator also provides internal clock signals to the encoding and decoding circuits. Note:When X2 is being driven by an external oscillator, X1 MUST be grounded. Crystal Specifications Resonant Frequency 20 MHz Tolerance ±0.001% at 25°C Stability ±0.0005% at 0°C - 70°C Type AT Cut Circuit Parallel Resonance Max. ESR 20 Ω Crystal Load Capacitor 20 pF The 20 Mhz crystal connection to DM9008 requires special care. The IEEE 802.3 standard requires the transmitted signal frequency to be accurate within ±0.01%. Stray capacitance can shift the crystal's frequency out of range and cause transmitted frequency to exceed its 0.01% tolerance. The frequency marked on the crystal is usually measured with a fixed load capacitance specified in the crystal's data sheet, typically 20 pF. In order to prevent distortion on the transmitted frequency, the total capacitance seen by the crystal should equal the total load capacitance. For a standard parallel setup, as shown in the diagram below, the 2 load caps C1 and C2 should equal 2(C1) minus any stay capacitances. 2(C1) is equal to the specific load capacity acting in series. Thus the trim capacitors required can be calculated as follows: C1 = 2XC1 - (Cb1 + Cd1), where Cb1 = Board cap on X1 and Cd1 = X1 dev cap C2 = 2XC1 - (Cb2 + Cd2), where Cb2 = Board cap on X2 and Cd2 = X2 dev cap The values of STNIC pins X1 and X2are the region of 5 pF. Figure 1. |
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