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TMS320DM642 Datasheet(PDF) 36 Page - Texas Instruments |
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TMS320DM642 Datasheet(HTML) 36 Page - Texas Instruments |
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36 / 178 page ![]() www.ti.com TMS320DM642 Video/Imaging Fixed-Point Digital Signal Processor SPRS200J – JULY 2002 – REVISED AUGUST 2005 Table 2-4. Terminal Functions (continued) SIGNAL IPD/ TYPE(1) DESCRIPTION IPU(2) NAME NO. AED19 G23 AED18 G26 AED17 H23 AED16 H24 AED15 C19 AED14 D19 AED13 A20 AED12 D20 AED11 B20 AED10 C20 I/O/Z IPU EMIFA external data AED9 A21 AED8 D21 AED7 B21 AED6 C21 AED5 A23 AED4 C22 AED3 B22 AED2 B23 AED1 A24 AED0 B24 MANAGEMENT DATA INPUT/OUTPUT (MDIO) XSP_CLK/MDCLK(3) R5 I/O/Z IPD PCI serial interface clock (O) [default] or MDIO serial clock input/output (I/O/Z). PCI serial interface data out (O) [default] or MDIO serial data input/output XSP_DO/MDIO(3) P5 I/O/Z IPU (I/O/Z). In PCI mode, this pin is connected to the input data pin of the serial PROM. VCXO INTERPOLATED CONTROL PORT (VIC) VCXO Interpolated Control Port (VIC) single-bit digital-to-analog converter (VDAC) output [output only] [default] or this pin can be programmed as a GP0 8 pin (I/O/Z) Boot Configuration: PCI frequency selection (PCI66). If the PCI peripheral is enabled (PCI_EN pin = 1), then: 0 - PCI operates at 66 MHz (default). VDAC/GP0[8]/PCI66(3) AD1 I/O/Z IPD 1 - PCI operates at 33 MHz. The –500 device supports PCI at 33 MHz only. For proper –500 device operation when the PCI peripheral is enabled (PCI_EN = 1), this pin must be pulled up with a 1-k Ω resistor at device reset. Note: If the PCI peripheral is disabled (PCI_EN pin = 0), this pin must not be pulled up. VIDEO PORTS (VP0, VP1, AND VP2) STCLK AC1 I IPD The STCLK signal drives the hardware counter on the video ports. 36 Device Overview |
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