TMS320DM642 datasheet(40/178 Pages) TI

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TMS320DM642

Video/Imaging Fixed-Point Digital Signal Processor

SPRS200J – JULY 2002 – REVISED AUGUST 2005

Table 2-4. Terminal Functions (continued)

SIGNAL

IPD/

TYPE(1)

DESCRIPTION

IPU(2)

NAME

NO.

INTER-INTEGRATED CIRCUIT 0 (I2C0)

SCL0

I/O/Z

—

I2C0 clock.

SDA0

I/O/Z

—

I2C0 data.

MULTICHANNEL BUFFERED SERIAL PORT 1 (McBSP1)

Video Port 1 (VP1) input/output data 8 pin (I/O/Z) or McBSP1 receive clock

VP1D[8]/CLKR1(3)

AD8

I/O/Z

IPD

(I/O/Z) [default]

VP1 input/output data 7 pin (I/O/Z) or McBSP1 receive frame sync (I/O/Z)

VP1D[7]/FSR1(3)

AC7

I/O/Z

IPD

[default]

VP1D[6]/DR1(3)

AD7

IPD

VP1 input/output data 6 pin (I/O/Z) or McBSP1 receive data (I) [default]

VP1 input/output data 5 pin (I/O/Z) or McBSP1 external clock source (I) (as

VP1D[5]/CLKS1(3)

AE7

IPD

opposed to internal) [default]

VP1D[4]/DX1(3)

AC6

I/O/Z

IPD

VP1 input/output data 4 pin (I/O/Z) or McBSP1 transmit data (O/Z) [default]

VP1 input/output data 3 pin (I/O/Z) or McBSP1 transmit frame sync (I/O/Z)

VP1D[3]/FSX1(3)

AD6

I/O/Z

IPD

[default]

VP1D[2]/CLKX1(3)

AE6

I/O/Z

IPD

VP1 input/output data 2 pin (I/O/Z) or McBSP1 transmit clock (I/O/Z) [default]

MULTICHANNEL BUFFERED SERIAL PORT 0 (McBSP0)

Video Port 0 (VP0) input/output data 8 pin (I/O/Z) or McBSP0 receive clock

VP0D[8]/CLKR0(3)

AE15

I/O/Z

IPD

(I/O/Z) [default]

VP0 input/output data 7 pin (I/O/Z) or McBSP0 receive frame sync (I/O/Z)

VP0D[7]/FSR0(3)

AB16

I/O/Z

IPD

[default]

VP0D[6]/DR0(3)

AC16

IPD

VP0 input/output data 6 pin (I/O/Z) or McBSP0 receive data (I) [default]

VP0 input/output data 5 pin (I/O/Z) or McBSP0 external clock source (I) (as

VP0D[5]/CLKS0(3)

AD16

IPD

opposed to internal) [default]

VP0D[4]/DX0(3)

AE16

O/Z

IPD

VP0 input/output data 4 pin (I/O/Z) or McBSP0 transmit data (O/Z) [default]

VP0 input/output data 3 pin (I/O/Z) or McBSP0 transmit frame sync (I/O/Z)

VP0D[3]/FSX0(3)

AF16

I/O/Z

IPD

[default]

VP0D[2]/CLKX0(3)

AF17

I/O/Z

IPD

VP0 input/output data 2 pin (I/O/Z) or McBSP0 transmit clock (I/O/Z) [default]

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