TMS320DM642 datasheet(92/178 Pages) TI

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CLKOUT6

AECLKIN

TMS320DM642

Video/Imaging Fixed-Point Digital Signal Processor

SPRS200J – JULY 2002 – REVISED AUGUST 2005

Table 5-17. Switching Characteristics Over Recommended Operating Conditions for CLKOUT6

(1) (2) (3)

(see Figure 5-13)

–500

–600

–720

NO.

PARAMETER

UNIT

CLKMODE = x1, x6, x12

MIN

MAX

tw(CKO6H)

Pulse duration, CLKOUT6 high

3P – 0.7

3P + 0.7

tw(CKO6L)

Pulse duration, CLKOUT6 low

3P – 0.7

3P + 0.7

tt(CKO6)

Transition time, CLKOUT6

(1)

The reference points for the rise and fall transitions are measured at VOL MAX and VOH MIN.

(2)

PH is the high period of CLKIN in ns and PL is the low period of CLKIN in ns.

(3)

P = 1/CPU clock frequency in nanoseconds (ns)

Figure 5-13. CLKOUT6 Timing

Table 5-18. Timing Requirements for AECLKIN for EMIFA

(1) (2) (3) (see Figure 5-14)

–500

–600

NO.

UNIT

–720

MIN

MAX

tc(EKI)

Cycle time, AECLKIN

6(4)

16P

tw(EKIH)

Pulse duration, AECLKIN high

2.7

tw(EKIL)

Pulse duration, AECLKIN low

2.7

tt(EKI)

Transition time, AECLKIN

tJ(EKI)

Period jitter, AECLKIN

0.02E

(1)

P = 1/CPU clock frequency in ns. For example, when running parts at 720 MHz, use P = 1.39 ns.

(2)

The reference points for the rise and fall transitions are measured at VIL MAX and VIH MIN.

(3)

E = the EMIF input clock (AECLKIN, CPU/4 clock, or CPU/6 clock) period in ns for EMIFA.

(4)

Minimum AECLKIN cycle times must be met, even when AECLKIN is generated by an internal clock source. Minimum AECLKIN times

are based on internal logic speed; the maximum useable speed of the EMIF may be lower due to AC timing requirements. On the 600

and 720 devices, 133-MHz operation is achievable if the requirements of the EMIF Device Speed section are met. On the 500 devices,

100-MHz operation is achievable if the requirements of the EMIF Device Speed section are met.

Figure 5-14. AECLKIN Timing for EMIFA

DM642 Peripheral Information and Electrical Specifications

TMS320DM642 Datasheet(PDF) 92 Page - Texas Instruments

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