PM6344 datasheet(127/256 Pages) PMC

127 / 256 page

STANDARD PRODUCT

PMC-Sierra, Inc.

PM6344 EQUAD

PMC-951013

ISSUE 5

QUADRUPLE E1 FRAMER

114

Interrupt Indication

Bit

Type

Function

Default

Bit 7

RRAI

Bit 6

RRMAI

Bit 5

AISDI

Bit 4

T16AISDI

Bit 3

REDI

Bit 2

AISI

Bit 1

FEBEI

Bit 0

CRCEI

A logic 1 in any bit position of this register indicates which maintenance or alarm

status generated an interrupt by changing state.

RRAI, RRMAI, AISDI, T16AISDI, REDI, and AISI:

RRAI, RRMAI, AISDI, T16AISDI, REDI, and AISI indicate when the

corresponding FRMR Maintenance/Alarm Status register bit has changed

state from logic 0 to logic 1 or vice-versa.

FEBEI:

The FEBEI bit becomes a logic one when a logic zero is received in the Si

bits of frames 13 or 15.

CRCEI:

The CRCEI bit becomes a logic one when a calculated CRC differs from the

received CRC remainder.

The bits in this register are set by a single error event.

The interrupt indications within this register work independently from the interrupt

enable bits, allowing the microprocessor to poll the register to determine the

state of the framer. The contents of this register are cleared to logic 0 after the

Maintenance/Alarm Status events.

PM6344 Datasheet(PDF) 127 Page - PMC-Sierra, Inc

PM6344 Datasheet(HTML) 127 Page - PMC-Sierra, Inc

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