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PM6344 Datasheet(PDF) 130 Page - PMC-Sierra, Inc |
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PM6344 Datasheet(HTML) 130 Page - PMC-Sierra, Inc |
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130 / 256 page ![]() STANDARD PRODUCT PMC-Sierra, Inc. PM6344 EQUAD PMC-951013 ISSUE 5 QUADRUPLE E1 FRAMER 117 Register 027H, 0A7H, 127H, 1A7H: FRMR Maintenance/Alarm Status Bit Type Function Default Bit 7 R RRA X Bit 6 R RRMA X Bit 5 R AISD X Bit 4 R T16AISD X Bit 3 R RED X Bit 2 R AIS X Bit 1 Unused X Bit 0 Unused X Reading this register returns the current state value of the RRA, RRMA, AISD, T16AISD, RED, and AIS maintenance/alarm statuses. RRA: The RRA bit is a logic one when the "A" bit (bit 3 in time slot 0 of the non- frame alignment signal frame) has been a logic one for 2 or 3 consecutive non-frame alignment signal frames, as determined by the RADEB bit. The RRA output is updated every two frames. RRMA: The RRMA bit is a logic one when the "Y" bit (bit 6 in time slot 16 in frame 0 of the signaling multiframes) has been a logic one for 2 or 3 consecutive signaling multiframes, as determined by the RMADEB bit. The RRMA bit is updated every 16 frames. AISD: The AISD bit is a logic one after an unframed pattern of all ones with less than 3 zeros in two consecutive frame times (512 bits) has been detected. The AISD bit is updated every 512 bit times. TS16AISD: The TS16AISD is a logic one after an all-ones byte has been detected in time slot 16 for 2 consecutive frames while out of signaling multiframe alignment. |
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