PM6344 datasheet(125/256 Pages) PMC

125 / 256 page

STANDARD PRODUCT

PMC-Sierra, Inc.

PM6344 EQUAD

PMC-951013

ISSUE 5

QUADRUPLE E1 FRAMER

112

Interrupt Enable

Bit

Type

Function

Default

Bit 7

R/W

RRAE

Bit 6

R/W

RRMAE

Bit 5

R/W

AISDE

Bit 4

R/W

T16AISDE

Bit 3

R/W

REDE

Bit 2

R/W

AISE

Bit 1

R/W

FEBEE

Bit 0

R/W

CRCEE

RRAE, RRMAE, AISDE, T16AISDE, REDE and AISE:

A logic one in bits RRAE, RRMAE, AISDE, T16AISDE, REDE or AISE

enables the generation of an interrupt on a change of state of the RRA,

RRMA, AISD, T16AISD, RED and AIS bits respectively of the FRMR

Maintenance/Alarm Status register.

FEBEE:

When the FEBEE bit is a logic one, an interrupt is generated when a logic

zero is received in the Si bits of frames 13 or 15.

CRCEE:

When the CRCEE bit is a logic one, an interrupt is generated when calculated

CRC differs from the received CRC remainder.

PM6344 Datasheet(PDF) 125 Page - PMC-Sierra, Inc

PM6344 Datasheet(HTML) 125 Page - PMC-Sierra, Inc

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