PM6344 datasheet(158/256 Pages) PMC

158 / 256 page

STANDARD PRODUCT

PMC-Sierra, Inc.

PM6344 EQUAD

PMC-951013

ISSUE 5

QUADRUPLE E1 FRAMER

145

Registers 03DH, 0BDH, 13DH and 1BDH: Backplane Parity Configuration

and Status

Bit

Type

Function

Default

Bit 7

R/W

BTPTYP

Bit 6

R/W

BTPRTYE

Bit 5

BTPCMPI

Bit 4

BTSIGPI

Bit 3

Unused

Bit 2

Unused

Bit 1

R/W

BRPTYP

Bit 0

R/W

BRPRTYE

These registers provide control and status reporting of data integrity checking on

the backplane buses. Parity bits in the first bit position of TS0 (henceforth called

the PRTY-bit position) represents parity over the previous frame (excluding the

parity bit) for the PCM and SIG data streams. BRX2RAIL must be set to logic 0.

BTPTYP:

The transmit backplane parity type (BTPTYP) bit sets even or odd parity in

the transmit streams. If BTPTYP is a logic zero, then the expected parity

value in the PRTY-bit position of BTPCM[x] and BTSIG[x] is even, thus it is a

one if the number of ones in the previous frame (excluding the PRTY-bit) is

odd. If BTPTYP is a logic one, then the expected parity value in the PRTY-bit

position of BTPCM[x] and BTSIG[x] is odd, thus it is a one if the number of

ones in the previous frame (excluding the PRTY-bit) is even.

BTPRTYE:

The BTPRTYE bit enables transmit parity interrupts. When set a logic one,

parity errors on inputs BTPCM[x] and BTSIG[x] are indicated by the BTPCMI

and BTSIGI bits, respectively, and by the INTB output. When set to logic

zero, parity errors are indicated by the BTPCMI and BTSIGI status bits but

are not indicated on the INTB output.

PM6344 Datasheet(PDF) 158 Page - PMC-Sierra, Inc

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