PM6344 datasheet(159/256 Pages) PMC

159 / 256 page

STANDARD PRODUCT

PMC-Sierra, Inc.

PM6344 EQUAD

PMC-951013

ISSUE 5

QUADRUPLE E1 FRAMER

146

BTPCMI:

The BTPCMI bit indicates if a parity error has been detected on the

BTPCM[x] input. This bit is cleared when this register is read. Odd or even

parity is selected by the BTPTYP bit.

BTSIGI:

The BTSIGI bit indicates if a parity error has been detected on the BTSIG[x]

input. This bit is cleared when this register is read. Odd or even parity is

selected by the BTPTYP bit.

BRPTYP:

The receive backplane parity type (BRPTYP) bit sets even or odd parity in the

receive streams. If BRPTYP is a logic zero, then the parity value in the PRTY-

bit position of BRPCM[x] and BRSIG[x] is even, thus it is a one if the number

of ones in the previous frame (excluding the PRTY-bit) is odd. If BRPTYP is a

logic one, then the parity value in the PRTY-bit position of BRPCM[x] and

BRSIG[x] is odd, thus it is a one if the number of ones in the previous frame

(excluding the PRTY-bit) is even. BRPTYP only has effect if BRPRTYE is a

logic one.

BRPRTYE:

The BRPRTYE bit enables receive parity insertion. When set a logic one,

parity is inserted into the PRTY-bit position of the BRPCM[x] and BRSIG[x]

streams. When set to logic zero, the data in the PRTY-bit position passes

through unaltered.

PM6344 Datasheet(PDF) 159 Page - PMC-Sierra, Inc