DS21352 datasheet(12/137 Pages) DALLAS

12 / 137 page

DS21352/DS21552

12 of 137

TDATA

Transmit Data

TSYSCLK

Transmit System Clock

TSSYNC

Transmit System Sync

TCHCLK

Transmit Channel Clock

Carry Out

MUX

Bus Operation

D0/AD0

I/O

Data Bus Bit0/ Address/Data Bus Bit 0

D1/AD1

I/O

Data Bus Bit1/ Address/Data Bus Bit 1

D2/AD2

I/O

Data Bus Bit 2/Address/Data Bus 2

D3/AD3

I/O

Data Bus Bit 3/Address/Data Bus Bit 3

DVSS

–

Digital Signal Ground

DVDD

Digital Positive Supply

D4/AD4

I/O

Data Bus Bit4/Address/Data Bus Bit 4

D5/AD5

I/O

Data Bus Bit 5/Address/Data Bus Bit 5

D6/AD6

I/O

Data Bus Bit 6/Address/Data Bus Bit 6

D7/AD7

I/O

Data Bus Bit 7/Address/Data Bus Bit 7

Address Bus Bit 0

Address Bus Bit 1

Address Bus Bit 2

Address Bus Bit 3

Address Bus Bit 4

Address Bus Bit 5

Address Bus Bit 6

ALE (AS)/A7

Address Latch Enable/Address Bus Bit 7

RD*(DS*)

Read Input(Data Strobe)

CS*

Chip Select

FMS

Framer Mode Select

WR*(R/W*)

Write Input(Read/Write)

RLINK

Receive Link Data

RLCLK

Receive Link Clock

DVSS

–

Digital Signal Ground

DVDD

–

Digital Positive Supply

RCLK

Receive Clock

DVDD

–

Digital Positive Supply

DVSS

–

Digital Signal Ground

RDATA

Receive Data

RPOSI

Receive Positive Data Input

RNEGI

Receive Negative Data Input

RCLKI

Receive Clock Input

Table 4-1 PIN DESCRIPTION SORTED BY PIN NUMBER (cont.)

SYMBOL

TYPE

DESCRIPTION

RCLKO

Receive Clock Output

RNEGO

Receive Negative Data Output

RPOSO

Receive Positive Data Output

RCHCLK

Receive Channel Clock

RSIGF

Receive Signaling Freeze Output

RSIG

Receive Signaling Output

RSER

Receive Serial Data

RMSYNC

Receive Multiframe Sync

RFSYNC

Receive Frame Sync

RSYNC

I/O

Receive Sync

RLOS/LOTC

Receive Loss Of Sync/ Loss Of Transmit Clock

100

RSYSCLK

Receive System Clock

DS21352 Datasheet(PDF) 12 Page - Dallas Semiconductor

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