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DS21352 Datasheet(PDF) 37 Page - Dallas Semiconductor

Part # DS21352
Description  3.3V DS21352 and 5V DS21552 T1 Single-Chip Transceivers
PDF  137 Pages
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Manufacturer  DALLAS [Dallas Semiconductor]
Direct Link  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS21352 Datasheet(HTML) 37 Page - Dallas Semiconductor

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DS21352/DS21552
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1 = Loss of Transmit Clock (LOTC)
RSMS
CCR3.4
RSYNC Multiframe Skip Control. Useful in framing format conversions from D4 to
ESF. This function is not available when the receive side elastic store is enabled.
0 = RSYNC will output a pulse at every multiframe
1 = RSYNC will output a pulse at every other multiframe note: for this bit to have any
affect, the RSYNC must be set to output multiframe pulses (RCR2.4=1 and
RCR2.3=0).
PDE
CCR3.3
Pulse Density Enforcer Enable.
0 = disable transmit pulse density enforcer
1 = enable transmit pulse density enforcer
ECUS
CCR3.2
Error Counter Update Select. See Section 8 for details.
0 = update error counters once a second
1 = update error counters every 42 ms (333 frames)
TLOOP
CCR3.1
Transmit Loop Code Enable. See Section 17 for details.
0 = transmit data normally
1 = replace normal transmitted data with repeating code as defined in TCD register
TESMDM
CCR3.0
Transmit Elastic Store Minimum Delay Mode. See Section 14.4 for details.
0 = elastic stores operate at full two frame depth
1 = elastic stores operate at 32–bit depth



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