ZLP32300 datasheet(14/99 Pages) ZILOG

14 / 99 page

Crimzon® ZLP32300

Product Specification

PS020823-0208

Pin Description

Pin Functions

XTAL1 Crystal 1 (Time-Based Input)

This pin connects a parallel-resonant crystal or ceramic resonator to the on-chip oscillator

input. Additionally, an optional external single-phase clock can be coded to the on-chip

oscillator input.

XTAL2 Crystal 2 (Time-Based Output)

This pin connects a parallel-resonant crystal or ceramic resonant to the on-chip oscillator

output.

Input/Output Ports

The CMOS input buffer for each Port 0, 1, or 2 pin is always connected to the pin, even

when the pin is configured as an output. If the pin is configured as an open-drain output

and no external signal is applied, a High output state can cause the CMOS input buffer

to float. This might lead to excessive leakage current of more than 100

µA. To prevent

this leakage, connect the pin to an external signal with a defined logic level or ensure

its output state is Low, especially during STOP mode.

Internal pull-ups are disabled on any given pin or group of port pins when programmed

into output mode.

Port 0, 1, and 2 have both input and output capability. The input logic is always present

no matter whether the port is configured as input or output. When doing a READ in-

struction, the MCU reads the actual value at the input logic but not from the output buff-

er. In addition, the instructions of OR, AND, and XOR have the Read-Modify-Write

sequence. The MCU first reads the port, and then modifies the value and load back to

the port.

Precaution must be taken if the port is configured as open-drain output or if the port is

driving any circuit that makes the voltage different from the desired output logic. For

example, pins P00–P07 are not connected to anything else. If it is configured as

Table 5. 40- and 48-Pin Configuration (Continued)

40-Pin PDIP No

48-Pin SSOP No

Symbol

Caution:

ZLP32300 Datasheet(PDF) 14 Page - Zilog, Inc.