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ZLP32300 Datasheet(PDF) 45 Page - Zilog, Inc. |
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ZLP32300 Datasheet(HTML) 45 Page - Zilog, Inc. |
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45 / 99 page ![]() Crimzon® ZLP32300 Product Specification PS020823-0208 Functional Description 41 Do not load these registers at the time the values are to be loaded into the counter/timer to ensure known operation. An initial count of 1 is not allowed. An initial count of 0 causes T16 to count from 0 to FFFFh to FFFEh. Transition from 0 to FFFFh is not a tim- eout condition. Figure 24. T16_OUT in SINGLE-PASS Mode Figure 25. T16_OUT in MODULO-N Mode T16 DEMODULATION Mode You must program TC16L and TC16H to FFh. After T16 is enabled, and the first edge (rising, falling, or both depending on CTR1 D5; D4) is detected, T16 captures HI16 and LO16, reloads, and begins counting. If D6 of CTR2 Is 0 When a subsequent edge (rising, falling, or both depending on CTR1, D5; D4) is detected during counting, the current count in T16 is complemented and put into HI16 and LO16. When data is captured, one of the edge detect status bits (CTR1, D1; D0) is set, and an interrupt is generated if enabled (CTR2, D2). T16 is loaded with FFFFh and starts again. Caution: TC16H*256+TC16L Counts “Counter Enable” Command T16_OUT Switches to Its Initial Value (CTR1 D0) T16_OUT Toggles, Timeout Interrupt TC16H*256+TC16L TC16H*256+TC16L TC16H*256+TC16L T16_OUT Toggles, Timeout Interrupt T16_OUT Toggles, Timeout Interrupt “Counter Enable” Command, T16_OUT Switches to Its Initial Value (CTR1 D0) TC16_OUT .. . |
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