ZLP32300 datasheet(32/99 Pages) ZILOG

32 / 99 page

Crimzon® ZLP32300

Product Specification

PS020823-0208

Functional Description

T8 Enable

This field enables T8 when set (written) to 1.

Single/Modulo-N

When set to 0 (Modulo-N), the counter reloads the initial value when the terminal count is

reached. When set to 1 (single-pass), the counter stops when the terminal count is reached.

Timeout

This bit is set when T8 times out (terminal count reached). To reset this bit, write a 1 to its

location.

Writing a 1 is the only way to reset the Terminal Count status condition. Reset this bit

before using/enabling the counter/timers. The first clock of T8 might not have complete

clock width and can occur any time when enabled.

Ensure to manipulate CTR0, bit 5 and CTR1, bits 0 and 1 (DEMODULATION mode)

when using the OR or AND commands. These instructions use a Read-Modify-Write

sequence in which the current status from the CTR0 and CTR1 registers is ORed or

ANDed with the designated value and then written back into the registers.

T8 Clock

These bits define the frequency of the input signal to T8.

Capture_INT_Mask

Set this bit to allow an interrupt when data is captured into either LO8 or HI8 upon a posi-

tive or negative edge detection in DEMODULATION mode.

Counter_INT_Mask

Set this bit to allow an interrupt when T8 has a timeout.

P34_Out

This bit defines whether P34 is used as a normal output pin or the T8 output.

T8 and T16 Common Functions—CTR1(0D)01h

This register controls the functions in common with the T8 and T16.

Table 8 lists and briefly describes the fields for this register.

Caution:

Note:

ZLP32300 Datasheet(PDF) 32 Page - Zilog, Inc.